This invention relates to a mixing digital to analog converter (DAC) and more particularly to such a mixing DAC which operates internally, without the need for an extra mixer circuit.
Conventional digital to analog converters (DAC""s) receive a digital input at a predetermined rate and provide an analog output at the same rate. In RF applications the output of the DAC is then up-converted through a separate mixer circuit. Additionally, high frequency DACs suffer from clock jitter which causes errors in the analog output signal. Jitter is caused by dynamic errors at the switching instant. One approach to the jitter problem, the return to zero approach, reduces the jitter by reducing the current to zero at the instant of switching.
This invention provides a mixing DAC for up-converting the analog output from the digital input without additional mixer circuits.
It is a further object of this invention to provide such a mixing DAC which preserves the return to zero solution to the jitter problem.
The invention results from the realization that a mixing DAC which automatically, internally, up-converts the analog output from the digital input can be achieved by varying the current output from each current source and each DAC. The current output has a plurality of peaks occurring at a predetermined rate, each clock period resulting in an analog output from the DAC which is up-converted to a rate commensurate to the predetermined input rate.
This invention features a mixing DAC including an analog output network, a current source, and a current switching circuit connected between the current source and the analog output network. A switch driver circuit responsive to a digital input at a first rate and a clock signal having a predetermined period, drives the current switching circuit to selectively interconnect the current source and the analog output network. A waveform generator drives the current source to produce an output current including a plurality of peaks at a second rate during each clock period to up-convert the response energy of the DAC analog output to approximately the second rate.
In a preferred embodiment, the current source, the current switching circuit, and the switch driver circuit may constitute a cell and there may be a plurality of such cells in the DAC. One waveform generator may drive all of the cells or there may be a waveform generator included in each cell. The current source in each cell may produce the output current at the same second rate. At least some of the current sources may produce the output current at other than the second rate. A current generator output current may be substantially sinusoidal. There may be valleys between the peaks of the current source output current and the valleys may be at substantially zero current.